The present invention relates to digital-to-analog conversion apparatuses or DA conversion apparatuses utilizing oversampling technology and noise shaping technology based on delta-sigma modulation.
FIG. 2 shows an example of the conventional DA conversion apparatus utilizing the combination of oversampling technology and noise shaping technology. In FIG. 2, the DA conversion apparatus is comprised of a digital filter 10 for oversampling a digital input DI having a varying value represented by multiple bits to feed an oversampled digital signal A, a delta-sigma modulator 12 for effecting delta-sigma modulation, i.e., differentiation/integration processing of the oversampled digital signal A to produce a modulated signal B having a requantized value represented by less number of bits, a waveform shaper 14 for waveform-shaping pulses of the modulated or requantized signal B in synchronization with a clock signal to produce a shaped pulse signal C, a clock generator 16 for generating a system clock signal .phi.s having a given frequency fs, and a low-pass filter or LPF 18 for filtering the pulse signal C to convert the same into an analog output AO corresponding to the digital input DI.
A circuit portion enclosed by the dot-and-chain line IC is composed of an integrated circuit of the monolithic or hybrid construction disposed in a single package, while a quartz resonator 16A is externally coupled to the clock generator 16 as an oscillating source. Otherwise, the digital filter 10 and its associated parts enclosed by the broken line may be incorporated into the same integrated circuit.
The digital input DI is given in the form of a digital waveform containing, for example, a sample sequence of digital data each composed of 16 bits, i.e., one word, and being fed to the digital filter 10 at, for example, 44.1 KHz a relatively slow data transfer rate. The system clock signal .phi.s has, for example, 16.9 MHz relatively fast frequency fs. Normally, the oversampled digital signal A is fed from the digital filter 10 to the delta-sigma modulator 12 at, for example, 8.45 MHz (fs/2) of fast data transfer rate.
The delta-sigma modulator 12 is provided to reduce an oversampling frequency or rate in the oversampling operation of the digital filter 10. Generally, the higher the oversampling rate, the better the filtering performance of the digital filter. However, the increase of oversampling rate may adversely affect the overall performance of the DA converter. In view of this, the delta-sigma modulator is utilized to noise-shape the oversampled digital signal to thereby reduce efficiently an oversampling rate. Therefore, the delta-sigma modultor is called a noise shaper. The delta-sigma modulator may be of single or double loop type constructed such as to produce the modulated or noise-shaped signal B in the form of a pulse-density-modulated signal or a bit stream signal. Otherwise, the delta-sigma modulator 12 may be of triple or more loop type constructed such as to produce a pulse-width-modulated signal B.
The delta-sigma modulator 12 operates to convert or requantize a multi-bit digital signal to a lesser-bit digital signal having a lesser number of bits. Such conversion may cause a quantization error which is distributed significantly to a relatively high frequency range. Namely, FIG. 3 indicates a power spectrum of an ideal output of the delta-sigma modulator 12. A noise power due to the quantization error becomes maximum in a high frequency range at the vicinity of fs/2. This power spectrum may contain a sharp line spectrum component Pa at a relatively low frequency range when an inputted digital signal is given in the form of a sine wave. Another spectrum component Pb is generated due to the system clock signal .phi.s having the frequency fs.
The requantized signal B regularly contains various noise components due to fluctuation or distortion during digital processing, over the ideal power spectrum. Therefore, if the requantized signal B were directly converted into an analog output, there would be caused a considerable conversion error due to the noise components. In view of this, the waveform shaper 14 is interposed to waveform-shape the modulated signal B based on the system clock signal .phi.s to thereby feed the waveform-shaped pulse signal C to the LPF18 in order to reduce DA conversion error due to noise components.
In the above noted conventional DA conversion apparatus, an oversampling ratio is determined in terms of fo/fi where fi denotes an input frequency or an input rate of the digital input DI to the digital filter 10, and fo denotes an output frequency of the modulated signal B from the delta-sigma modulator 12. Generally, the greater the oversampling ratio, the greater the S/N ratio. FIG. 4 shows an example of such relation between the oversampling ratio and the S/N ratio, where a requantization bit number is set to 2 and the loop number K is set to 1-4 in the delta-sigma modulator 12. As understood from the FIG. 4 graph, the oversampling ratio might be set as great as possible in order to obtain a practically good S/N ratio. For example, in order to obtain 120 dB of S/N ratio with using a double loop (K=2) type of the delta-sigma modulator, the oversampling ratio should be set in the order of 400 as seen from the FIG. 4 graph. If an initial sampling of the original digital input DI is carried out at the sampling rate of 50 KHz, the delta-sigma modulating operation should be carried out at the rate of 20 MHz to realize the desired oversampling ratio of 400 so that the system clock frequency fs is set to 20 MHz in the D/A conversion apparatus or system. In order to drive the system at such high frequency or speed, the various circuit components 10, 12, 14, 16 and so on must have considerably high speed performance, and further a shielding construction may be needed to avoid radio trouble due to subsidiary radiation, thereby causing drawbacks such as complicated construction and cost increase.